From Distributed Memory Cycle Detection to Parallel LTL Model Checking
| Authors | |
|---|---|
| Year of publication | 2004 |
| Type | Article in Proceedings |
| Conference | Proceedings of the Ninth International Workshop on Formal Methods for Industrial Critical Systems (FMICS 2004) |
| MU Faculty or unit | |
| Citation | |
| Field | Informatics |
| Keywords | LTL model checking; breadth first search; distributed memory |
| Description | We propose a parallel graph algorithm for detecting cycles in very large directed graphs distributed over a network of workstations. The algorithm employs back-level edges as computed by the breadth first search. In this paper we describe how to turn the algorithm into an explicit state distributed memory LTL model checker by extending it with detection of accepting cycles, counterexample generation and partial order reduction. We discuss these extensions and show experimental results. |
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