Vyhledávání v IPv6 směrovači implementovaném v hradlovém poli

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Title in English	Lookups in IPv6 router implemented in an FPGA
Authors	ANTOŠ David KOŘENEK Jan ŘEHÁK Vojtěch
Year of publication	2003
Type	Article in Proceedings
Conference	EurOpen, Sborník příspěvků XXIII. konference
MU Faculty or unit	Faculty of Informatics
Citation
Field	Informatics
Keywords	IPv6 routing; FPGA; nanoprocessor; IP header lookup
Description	The article describes design of a lookup processor implemented in an IPv6 routing accelerator.
Related projects:	Automated Verification of Parallel and Distributed Systems Non-sequential Models of Computing -- Quantum and Concurrent Distributed Models of Computing