Is Satisfiability of Quantified Bit-Vector Formulas Stable Under Bit-Width Changes?
| Authors | |
|---|---|
| Year of publication | 2018 |
| Type | Article in Proceedings |
| Conference | LPAR-22. 22nd International Conference on Logic for Programming, Artificial Intelligence and Reasoning |
| MU Faculty or unit | |
| Citation | |
| web | https://easychair.org/publications/paper/wPNs |
| Doi | http://dx.doi.org/10.29007/spnx |
| Keywords | satisfiability modulo theories; quantified bit-vectors; bit-width; experimental evaluation |
| Description | In general, deciding satisfiability of quantified bit-vector formulas becomes harder with increasing maximal allowed bit-width of variables and constants. However, this does not have to be the case for formulas that come from practical applications. For example, software bugs often do not depend on the specific bit-width of the program variables and would manifest themselves also with much lower bit-widths. We experimentally evaluate this thesis and show that satisfiability of the vast majority of quantified bit-vector formulas from the smt-lib repository remains the same even after reducing bit-widths of variables to a very small number. This observation may serve as a starting-point for development of heuristics or other techniques that can improve performance of smt solvers for quantified bit-vector formulas. |
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